ddu18 doc #97041 data delay devices, inc. 1 12/12/97 3 mt. prosp ect ave. clifton, nj 07013 8-tap, ecl-interfaced fixed delay line (series ddu18) features packages eight equally spaced outputs fits in 400 mil 24-pin dip socket input & outputs fully 100k-ecl interfaced & buffered functional description the ddu18-series device is a 8-tap digitally buffered delay line. the signal input (in) is reproduced at the outputs (t1-t8), shifted in time by an amount determined by the device dash number (see table). for dash numbers less than 16, the total delay of the line is measured from t1 to t8. the nominal tap-to-tap delay increment is given by one-seventh of the total delay, and the inherent delay from in to t1 is nominally 2.0ns. for dash numbers greater than or equal to 16, the total delay of the line is measured from in to t8. the nominal tap-to-tap delay increment is given by one-eighth of this number. series specifications minimum input pulse width: 40% of total delay output rise time: 2ns typical supply voltage: -5vdc 5% power dissipation: 500mw typical (no load) operating temperature: 0 to 85 c temp. coefficient of total delay: 100 ppm/ c 1/7 1/7 1/7 1/7 vcc gnd in t1 t2 t3 t4 functional diagram for dash numbers < 16 2.0ns 1/7 1/7 1/7 t5 t6 t7 t8 1/8 1/8 1/8 1/8 vcc gnd in t1 t2 t3 t4 functional diagram for dash numbers >= 16 1/8 1/8 1/8 t5 t6 t7 t8 1/8 1997 data delay devices data delay devices, inc. 3 24 19 18 13 1 3 4 5 6 7 8 9 10 11 12 gnd t1 t2 t3 gnd gnd t4 t5 t6 t7 t8 in gnd vee gnd 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 gnd n/c t1 t2 t3 gnd gnd t4 t5 t6 t7 t8 in n/c n/c n/c n/c gnd vee n/c n/c n/c n/c t10 ddu18-xx dip ddu18-xxm military dip ddu18-xxc3 smd ddu18-xxmc3 mil smd pin descriptions in signal input t1-t8 tap outputs vee -5 volts gnd ground dash number specifications part number total delay ( ns) delay per tap ( ns) ddu18-4 3.5 1.0 * 0.5 0.3 ddu18-8 7.0 1.0 * 1.0 0.4 ddu18-12 10.5 1.0 * 1.5 0.4 ddu18-16 16 1.0 2.0 0.5 ddu18-20 20 1.0 2.5 1.0 ddu18-24 24 1.2 3.0 1.5 ddu18-32 32 1.6 4.0 2.0 ddu18-40 40 2.0 5.0 2.0 ddu18-48 48 2.4 6.0 2.0 ddu18-56 56 2.8 7.0 2.0 ddu18-64 64 3.2 8.0 2.0 ddu18-72 72 3.6 9.0 2.0 ddu18-80 80 4.0 10.0 2.5 ddu18-100 100 5.0 12.5 2.5 ddu18-120 120 6.0 15.0 3.0 ddu18-160 160 8.0 20.0 4.0 ddu18-200 200 10.0 25.0 5.0 * total delay is referenced to first tap output input to first tap = 2.0ns 1ns note: any dash number between 4 and 200 not shown is also available.
ddu18 doc #97041 data delay devices, inc. 2 12/12/97 tel: 973-773- 2299 fax: 973-773-9672 http://www.datadelay.com application notes high frequency response the ddu18 tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. although the device will function properly for pulse widths as small as 40% of the total delay and periods as small as 80% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. however, for a given input condition, the deviation will be repeatable from pulse to pulse. contact technical support at data delay devices if your application requires device testing at a specific input condition. power supply bypassing the ddu18 relies on a stable power supply to produce repeatable delays within the stated tolerances. a 0.1uf capacitor from vee to gnd, located as close as possible to the vee pin, is recommended. a wide vee trace and a clean ground plane should be used. device specifications table 1 : absolute maximum ratings parameter symbol min max units notes dc supply voltage v ee -7.0 0.3 v input pin voltage v in v ee - 0.3 0.3 v storage temperature t strg -55 150 c lead temperature t lead 300 c 10 sec table 2 : dc electrical characteristics (0c to 85c) parameter symbol min typ max units notes high level output voltage v oh -1.025 -0.880 v v ih = max,50 w to -2v low level output voltage v ol -1.810 -1.620 v v il = min, 50 w to -2v high level input voltage v ih -1.165 -0.880 v low level input voltage v il -1.810 -1.475 v high level input current i ih 340 m a v ih = max low level input current i il 0.5 m a v il = min
ddu18 doc #97041 data delay devices, inc. 3 12/12/97 3 mt. prosp ect ave. clifton, nj 07013 package dimensions 19 18 ddu18-xx (commercial dip) ddu18-xxm (military dip) .130 .030 1.300 max. 1 4 6 .300 max. .018 typ. .530 max. .400 typ. .012 typ. 1.100 typ. .015 typ. .100 typ. 12 11 13 24 5 3 7 8 9 10 ddu18-xxc4 (commercial smd) ddu18-xxmc4 (military smd) 1.280 .020 .882 .005 .020 typ. .040 typ. .100 .090 1.100 .280 max. .590 max. .010 .002 .050 .010 .710 .005 .007 .005 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
ddu18 doc #97041 data delay devices, inc. 4 12/12/97 tel: 973-773- 2299 fax: 973-773-9672 http://www.datadelay.com delay line automated testing test conditions input: output: ambient temperature: 25 o c 3 o c load: 50 w to -2v supply voltage ( vcc): -5.0v 0.1v c load : 5pf 10% input pulse: standard 10kh ecl threshold: (v oh + v ol ) / 2 levels (rising & falling) source impedance: 50 w max. rise/fall time: 2.0 ns max. ( measured between 20% and 80%) pulse width: pw in = 1.5 x total delay period: per in = 10 x total delay note: the above conditions are for test only and do not in any way restrict the operation of the device. t1 out trig in ref trig test setup device under test (dut) oscilloscope pulse generator in t2 t3 t4 t5 t6 t7 t8 timing diagram for testing d rise d fall per in pw in t rise t fall 20% 20% 50% 50% 80% 80% 50% 50% v ih v il v oh v ol input signal output signal
|
